divide by 5 counter

this is divide by 5 counter with little tweaking from divide by 3 counter. just find the condition for t[1:0]

module by5(clk,op);
input clk;
output reg op;
reg[1:0] t;
reg [2:0]q;
initial
begin
op <= 1'b0;
q <= 3'b0;
t <= 2'b0;

end
always @ (negedge clk) begin
if (q<3'b100) begin //this differs from by3 counter
q<=(q+1);
end else begin
q<=0;
end
end


always @ (posedge clk) begin

if (~q[0] & q[1] & ~q[2])
t[1]<=~t[1];
end
always @ (negedge clk) begin
if (~q[0] & ~q[1] & q[2])
t[0]<=~t[0];
end

always @ (t) begin
op<= (t[0]^t[1]);
end

endmodule

module by5_tb; //testbench
reg clk;
wire op;
by5 test_bench(clk,op);
always
#1 clk = ~clk;
initial
begin
clk=1'b0;
#50 $finish;
end
initial
begin
$display("time\t\top");
$monitor("%g\t%b",$time,op);
end
initial
begin
$dumpfile("waveby5.vcd");
$dumpvars(0,by5_tb);
end
endmodule